The present invention relates to a liquid crystal display device provided with a gate insulating film and a layer insulating film which are formed of insulating materials respectively having different dielectric constants.
FIGS. 8 and 9 show a thin-film transistor array structure having gate lines G and source lines S formed on a substrate, and intended for use on an active matrix liquid crystal display. In the thin-film transistor array structure shown in FIGS. 8 and 9, gate lines G and source lines S are formed in a matrix on a transparent substrate 6, such as a glass substrate. A thin-film transistor 3 is formed near each intersection point of the gate line G and the source line S.
The thin-film transistor 3 shown in FIGS. 8 and 9 is of a generally known etch stopper type bottom gate construction. A gate insulating film 9 is formed over the gate lines G and gate electrodes 8 extending from the gate lines G, a semiconductor film 10, such as anamorphous silicon film (a-Si film), is formed on the gate insulating film 9, drainelectrodes 11 of a conductive material is formed on the semiconductor film 10, and source electrodes 12 of a conductive material are formed on the semiconductor film 10 opposite to the drain electrodes 11, respectively. An ohmic contact film 10a of amorphous silicon heavily doped with an impurity, such as phosphorus, is formed over the semiconductor film 10, and an etching stopper 13 is formed on the ohmic contact film 10a so as to extend between the drain electrode 11 and the source electrode 12. A transparent pixel electrode 15 of a transparent electrode material is formed so as to extend over the drain electrode 11 toward a side of the drain electrode 11.
A passivation film 16 is formed so as to cover the gate insulating film 9, the source electrodes 12 and the transparent pixel electrodes 15. An alignment layer, not shown, is formed on the passivation film 16, and a liquid crystal is placed over the alignment layer to form an active matrix liquid crystal display device. An electric field is applied to the molecules of the liquid crystal by the transparent pixel electrode 15 to control the alignment of the molecules of the liquid crystal.
A thin-film transistor 20 of what is called a top gate construction shown in FIG. 10 employed in another known liquid crystal display device has semiconductor films 22 and 23, an active semiconductor layer 24 formed between the semiconductor films 22 and 23, an insulating film 25 formed on the active semiconductor layer 24, a gate electrode 26 formed on the insulating film 25, a silicide layer 27 formed on the semiconductor films 22 and 23, a source electrode 28 formed on a portion of the silicide layer 27 corresponding to the semiconductor film 22, and a drain 29 formed on a portion of the silicide layer 27 corresponding to the semiconductor film 23.
In the thin-film transistor 3 shown in FIGS. 8 and 9 (the thin-film transistor 20 shown in FIG. 10), a channel region is formed in the semiconductor film 10 (the active semiconductor layer 24) by applying a voltage to the gate electrode 8 (the gate electrode 26) to enable carriers to move through the channel. Thus, current that flows across the source electrode and the drain electrode is controlled by applying a voltage to the gate electrode 8 (the gate electrode 26).
A parasitic capacitance is created unavoidably in the thin-film transistor array structure shown in FIG. 9. The parasitic capacitance is created necessarily because the gate lines G and the source lines S are formed in a matrix on the substrate with the insulating film interposed between the gate lines G and the source lines S. Such parasitic capacitance of a driving circuit for driving the liquid crystal is liable to cause a delay in signal transmission.
In the thin-film transistors shown in FIGS. 8 and 9, and in FIG. 10, it is important that an electric field created by the gate electrode acts efficiently on the channel region for a transistor action. However, there has not been any thin-film transistor of a construction capable of avoiding the creation of parasitic capacitance and of improving the efficiency of transistor action.